Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0034H 002CH 0000H 003CH 0034H 002CH 0000H 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip. A is wrong R is correct Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is correct R is wrong A is wrong R is correct Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is correct R is wrong ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The word size of 8085 microprocessor is 4-bit 16-bit 8-bit 20-bit 4-bit 16-bit 8-bit 20-bit ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Program counter in a digital computer Counts the number of times a subroutine is called. Points the memory address of the next instruction to be fetched. Counts the numbers of programs run in the machine. Counts the number of times the loops are executed. Counts the number of times a subroutine is called. Points the memory address of the next instruction to be fetched. Counts the numbers of programs run in the machine. Counts the number of times the loops are executed. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS