Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0000H 0034H 002CH 003CH 0000H 0034H 002CH 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of hardware interrupts present in 8085 microprocessor are 8 10 16 5 8 10 16 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 2, 3, 5 1, 2, 5 1, 3, 4 1, 3, 5 2, 3, 5 1, 2, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines None of these status lines higher order address lines lower order address lines None of these status lines higher order address lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many T-states are required for execution of OUT 80H instruction? 16 10 7 13 16 10 7 13 ANSWER DOWNLOAD EXAMIANS APP
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