Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 003CH 0034H 002CH 0000H 003CH 0034H 002CH 0000H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus of any microprocessor is always None Unidirectional Bi-directional Either unidirectional or bi-directional None Unidirectional Bi-directional Either unidirectional or bi-directional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. EI SIM DI RIM EI SIM DI RIM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, all flags will be affected only carry flag will be affected no flags will be affected only carry and zero flags will be affected all flags will be affected only carry flag will be affected no flags will be affected only carry and zero flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The relation among IC (Instruction Cycle), FC (Fetch cycle) and EC (Execute Cycle) is IC = FC + EC IC = FC + 2EC EC = IC + FC IC = FC - EC IC = FC + EC IC = FC + 2EC EC = IC + FC IC = FC - EC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to memory data register. transferred to address bus. incremented by one. transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. transferred to memory address register . ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS