Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0034H 003CH 002CH 0000H 0034H 003CH 002CH 0000H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time It increases the speed of data transfer over the data bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the non-maskable interrupt from the following RST 4.5 RST 7.5 RST 6.5 RST 5.5 RST 4.5 RST 7.5 RST 6.5 RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to save accumulator value on the stack, which of the following instruction may be used PUSH PSW POP PSW PUSH A PUSH SP PUSH PSW POP PSW PUSH A PUSH SP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Sets Can not change Complements Clears Sets Can not change Complements Clears ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following I) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flag. Which one of the above flags is/are present in 8085 microprocessor? (I) only (I) ,(III) & (IV) (I) & (II) (II) & (III) (I) only (I) ,(III) & (IV) (I) & (II) (II) & (III) ANSWER DOWNLOAD EXAMIANS APP
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