Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0000H 002CH 003CH 0034H 0000H 002CH 003CH 0034H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 3, 4 2, 3, 5 1, 2, 5 1, 3, 5 1, 3, 4 2, 3, 5 1, 2, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A high on RESET OUT signifies that processing can begin when this signal goes high all the registers of the CPU are being reset all the registers and counters are being reset and this signal can be used to reset external support chip all the registers and counters are being reset processing can begin when this signal goes high all the registers of the CPU are being reset all the registers and counters are being reset and this signal can be used to reset external support chip all the registers and counters are being reset ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8275 8279 8259 8257 8275 8279 8259 8257 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Decoder Gate Register Mux Decoder Gate Register Mux ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many T-states are required for execution of OUT 80H instruction? 13 10 16 7 13 10 16 7 ANSWER DOWNLOAD EXAMIANS APP
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