Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 0000H 002CH 0034H 003CH 0000H 002CH 0034H 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A . A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A . ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following I) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flag. Which one of the above flags is/are present in 8085 microprocessor? (II) & (III) (I) ,(III) & (IV) (I) only (I) & (II) (II) & (III) (I) ,(III) & (IV) (I) only (I) & (II) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The reason for the presence of ALE pin in 8085, but not in 6800 is that 8085 has multiplexed bus, whereas 6800 does not have None 8085 has 5 interrupts lines, whereas 6800 has only two 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O 8085 has multiplexed bus, whereas 6800 does not have None 8085 has 5 interrupts lines, whereas 6800 has only two 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Main memory and I/O devices Cache memory and I/O devices Cache and main memory Two I/O devices Main memory and I/O devices Cache memory and I/O devices Cache and main memory Two I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA signal/signals in 8085 is/are All. READY. HOLD. HLDA. All. READY. HOLD. HLDA. ANSWER DOWNLOAD EXAMIANS APP
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