Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 002CH 0000H 0034H 003CH 002CH 0000H 0034H 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 0FFF H and 0FFE H 0FFE H and 0FFF H 1000 H and 0FFF H 1000 H and 1001 H 0FFF H and 0FFE H 0FFE H and 0FFF H 1000 H and 0FFF H 1000 H and 1001 H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following instruction is not possible in 8085? POP B POP 30 H POP D POP PSW POP B POP 30 H POP D POP PSW ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The microprocessor may be made to exit from HALT state by asserting any of the five interrupt lines A or B or HOLD line READY line RESTART any of the five interrupt lines A or B or HOLD line READY line RESTART ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST0 - RST7 are the __________ in 8085. hardware interrupts software interrupts logical interrupts conditional interrupts hardware interrupts software interrupts logical interrupts conditional interrupts ANSWER DOWNLOAD EXAMIANS APP
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