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Microprocessor

Microprocessor
In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location

 0000H
 003CH
 0034H
 002CH

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Microprocessor
Inintel 8085A microprocessor ALE signal is made high to

 Enable the data bus to be used as low order address bus
 To disable data bus
 To achieve all the functions listed above
 To latch data D0-D7 from data bus

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Microprocessor
The minimum number of transistors required to implement a two input AND gate is

2
6
8
4

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Microprocessor
A mask programmed ROM is

 programmed at the time of fabrication
 programmed by the user
 erasable and programmable
 erasable electrically

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Microprocessor
Number of Hex digits needed to represent the 20-bit address of a memory location are

 5
 16
 4
 20

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Microprocessor
The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between

 T1 & T2
 T3 & T4
 T2 & T3
 T4 & T1

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