Microprocessor The data lines of 8085 microprocessor are multiplexed with None of these higher order address lines lower order address lines status lines None of these higher order address lines lower order address lines status lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 6.5 TRAP RST 5.5 both ‘a’ and ‘b’ RST 6.5 TRAP RST 5.5 both ‘a’ and ‘b’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle An op-code fetch cycle A memory read cycle A memory write cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of register C be 00000000 before the instruction DCR C is executed. The content of register C after the after the execution of this instruction will be 00000000 00000001 11111111 None 00000000 00000001 11111111 None ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following circuits transmits two messages simultaneously in one direction Quadruplex Diplex Duplex Simplex Quadruplex Diplex Duplex Simplex ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW B-C Stack Pointer D-E PSW B-C Stack Pointer D-E ANSWER DOWNLOAD EXAMIANS APP
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