Microprocessor The data lines of 8085 microprocessor are multiplexed with status lines higher order address lines lower order address lines None of these status lines higher order address lines lower order address lines None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T1 OP code fetch T3 OP code fetch T2 OP code fetch T4 OP code fetch T1 OP code fetch T3 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An 8-bit microprocessor signifies that 8-bit data bus 8-bit address bus 8-bit controller 8-interrupt lines 8-bit data bus 8-bit address bus 8-bit controller 8-interrupt lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Bus Interface Unit (BIU) in 8086 performs the following functions: Instruction fetch. Instruction decoding. Arithmatic and Logic operations. All the above. Instruction fetch. Instruction decoding. Arithmatic and Logic operations. All the above. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable. NIBBLE BYTE DOUBLEWORD (32 bits) WORD (16 bits) NIBBLE BYTE DOUBLEWORD (32 bits) WORD (16 bits) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which memory has read operation, byte erase, byte write and chip erase? UVEPROM EEPROM Both B and C RAM UVEPROM EEPROM Both B and C RAM ANSWER DOWNLOAD EXAMIANS APP
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