Microprocessor Which one of the following microprocessor has 16-bit data bus? 68000 8085 Z-80 6502 68000 8085 Z-80 6502 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘b’ and ‘c’ None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A. A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. B-C PSW Stack Pointer D-E B-C PSW Stack Pointer D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always reset always set affected indicating specific conditions not affected always reset always set affected indicating specific conditions not affected ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS