Microprocessor For a memory with a 16-bit address space, the addressability is 16 bits 2^16 bits 8 bits Cannot be determined 16 bits 2^16 bits 8 bits Cannot be determined ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. B-C PSW D-E Stack Pointer B-C PSW D-E Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following registers: 1. Accumulator and flag register 2. B and C register 3. D and E register 4. H and L register Which of these 8-bit registers of 8085 microprocessor can be paired together to make a 16-bit register? 1, 2 and 4 1, 3 and 4 1, 2 and 3 2, 3 and 4 1, 2 and 4 1, 3 and 4 1, 2 and 3 2, 3 and 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Processor is capable of waiting External buffer is used Neither A nor B Either A or B Processor is capable of waiting External buffer is used Neither A nor B Either A or B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Both the ALU and control section of CPU employ which special purpose storage location? Registers Accumulators Decoders Buffers Registers Accumulators Decoders Buffers ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS