Microprocessor In order to complement the lower nibble of accumulator one can use XRI 0FH CMA ORI 0FH ANI 0FH XRI 0FH CMA ORI 0FH ANI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with lower order address lines status lines None of these higher order address lines lower order address lines status lines None of these higher order address lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data bus of any microprocessor is always Either unidirectional or bi-directional None Unidirectional Bi-directional Either unidirectional or bi-directional None Unidirectional Bi-directional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 sets zero and sign flags reset zero and parity flags reset carry and sign flags sets zero and carry flags sets zero and sign flags reset zero and parity flags reset carry and sign flags sets zero and carry flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions all interrupts except non-maskable interrupt are disabled the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any interrupt the microprocessor cannot be interrupted by any mask able interrupt all interrupts except non-maskable interrupt are disabled the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any interrupt the microprocessor cannot be interrupted by any mask able interrupt ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 RST 5.5 TRAP INTR RST 7.5 RST 5.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
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