Microprocessor In order to complement the lower nibble of accumulator one can use ANI 0FH CMA XRI 0FH ORI 0FH ANI 0FH CMA XRI 0FH ORI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The addressing mode in instruction PUSH B is register direct register indirect immediate register direct register indirect immediate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A bus connected between the CPU and main memory that permits transfer of information between main memory and the CPU is known as DMA bus Memory bus Address bus Control bus DMA bus Memory bus Address bus Control bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, the RST6 instruction transfer programme execution to following location 0030H. 0048H. 0060H. 0024H. 0030H. 0048H. 0060H. 0024H. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To slow down a fast peripheral device so as to communicate at the microprocessor’s device. None of these To indicate to user that the microprocessor is working and is ready for use. ANSWER DOWNLOAD EXAMIANS APP
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