Microprocessor In order to complement the lower nibble of accumulator one can use ANI 0FH XRI 0FH CMA ORI 0FH ANI 0FH XRI 0FH CMA ORI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data bus of any microprocessor is always Bi-directional Either unidirectional or bi-directional None Unidirectional Bi-directional Either unidirectional or bi-directional None Unidirectional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Direct Immediate Implicit Register Direct Immediate Implicit Register ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The addressing mode in instruction PUSH B is register indirect immediate direct register register indirect immediate direct register ANSWER DOWNLOAD EXAMIANS APP
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