Microprocessor In order to complement the lower nibble of accumulator one can use CMA ORI 0FH XRI 0FH ANI 0FH CMA ORI 0FH XRI 0FH ANI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While CMP B instruction executes, no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. no flags will be affected. all flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor differentiates between op code, data/address at any time by the sequence in which memory contents are fetched by it the program counter its internal registers the stack pointer the sequence in which memory contents are fetched by it the program counter its internal registers the stack pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor For a memory with a 16-bit address space, the addressability is 8 bits 2^16 bits Cannot be determined 16 bits 8 bits 2^16 bits Cannot be determined 16 bits ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many T-states are required for execution of OUT 80H instruction? 10 13 7 16 10 13 7 16 ANSWER DOWNLOAD EXAMIANS APP
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