Microprocessor In order to complement the lower nibble of accumulator one can use ORI 0FH CMA XRI 0FH ANI 0FH ORI 0FH CMA XRI 0FH ANI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T2 OP code fetch T1 OP code fetch T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch T4 OP code fetch T3 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “1”? AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An 8-bit microprocessor can have ………….. address lines. cannot be predicted 8 16 32 cannot be predicted 8 16 32 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many 16-bit special purpose registers are present in 8085 microprocessor? 2 16 8 6 2 16 8 6 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many machine cycles are required for execution of IN 30H instruction 3 5 6 4 3 5 6 4 ANSWER DOWNLOAD EXAMIANS APP
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