Microprocessor In order to complement the lower nibble of accumulator one can use XRI 0FH ORI 0FH CMA ANI 0FH XRI 0FH ORI 0FH CMA ANI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is PCHL & DAD D XCHG & DAD H XTHL & DAD H XCHG & DAD B PCHL & DAD D XCHG & DAD H XTHL & DAD H XCHG & DAD B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional A is false but R is true Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A A is true but R is false A is false but R is true Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A A is true but R is false ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick out the matching pair SID; SIM READY; RIM S0;S1;wait status HOLD; DMA SID; SIM READY; RIM S0;S1;wait status HOLD; DMA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data bus of any microprocessor is always Either unidirectional or bi-directional Bi-directional None Unidirectional Either unidirectional or bi-directional Bi-directional None Unidirectional ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ‘Burst refresh’ in DRAM is also called Distributed refresh None of these Hidden refresh Concentrated refresh Distributed refresh None of these Hidden refresh Concentrated refresh ANSWER DOWNLOAD EXAMIANS APP
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