Microprocessor In order to complement the lower nibble of accumulator one can use CMA XRI 0FH ORI 0FH ANI 0FH CMA XRI 0FH ORI 0FH ANI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated R is asserted, S is asserted R is asserted, S is negated R is negated, S is asserted R is negated, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Length of the instruction POP D is 2 byte 1 byte 3 byte 4 byte 2 byte 1 byte 3 byte 4 byte ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2000H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS