Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. RIM EI SIM DI RIM EI SIM DI ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Identify the communication interfacing device from the following 8251 8257 8155 8255 8251 8257 8155 8255 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While STC instruction executes, all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. all flags will be affected. only carry and zero flags will be affected. no flags will be affected. only carry flag will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable. NIBBLE BYTE DOUBLEWORD (32 bits) WORD (16 bits) NIBBLE BYTE DOUBLEWORD (32 bits) WORD (16 bits) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache and main memory Main memory and I/O devices Two I/O devices Cache memory and I/O devices Cache and main memory Main memory and I/O devices Two I/O devices Cache memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a computer the data transfer between hard disk and CPU is nearly the same as that between diskette and CPU. False True False True ANSWER DOWNLOAD EXAMIANS APP
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