Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Complements Sets Clears Can not change Complements Sets Clears Can not change ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system I/O ports are used to interface the I/O devices and memory chips the I/P device only all the I/O devices the O/P devices only the I/O devices and memory chips the I/P device only all the I/O devices the O/P devices only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip. A is correct R is wrong Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is wrong R is correct A is correct R is wrong Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is wrong R is correct ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following microprocessor has 16-bit data bus? Z-80 68000 8085 6502 Z-80 68000 8085 6502 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? D-E. Program Counter. H-L. Stack Pointer. D-E. Program Counter. H-L. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS