Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Can not change Complements Sets Clears Can not change Complements Sets Clears ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Total numbers of output pins in 8085 microprocessor are 40 27 30 13 40 27 30 13 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? INTR RST 7.5 TRAP RST 5.5 INTR RST 7.5 TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. EI DI RIM SIM EI DI RIM SIM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits set (i.e. FFH) all bits reset (i.e. 00H) irrelevant same as the content of A7-A0 all bits set (i.e. FFH) all bits reset (i.e. 00H) irrelevant same as the content of A7-A0 ANSWER DOWNLOAD EXAMIANS APP
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