Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Clears Sets Complements Can not change Clears Sets Complements Can not change ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. PSW D-E Stack Pointer B-C PSW D-E Stack Pointer B-C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The clock speed of 8085 is 3.2KHz. 3.2MHz. 1MHz. 1KHz. 3.2KHz. 3.2MHz. 1MHz. 1KHz. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The character set of Fortran 77 includes lower case alphabets a to z. False True False True ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T4 & T1 T1 & T2 T3 & T4 T2 & T3 T4 & T1 T1 & T2 T3 & T4 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a vector interrupt the branch address is assigned to a fixed location in memory. the branch address is obtained from a register in the processor. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is assigned to a fixed location in memory. the branch address is obtained from a register in the processor. none. the interrupting source supplies the branch information to the processor through an interrupt vector. ANSWER DOWNLOAD EXAMIANS APP
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