Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Sets Can not change Clears Complements Sets Can not change Clears Complements ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following? Memory cycle Clock cycle Instruction cycle Machine cycle Memory cycle Clock cycle Instruction cycle Machine cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor After RESET 8255 will be in mode 2 mode 0; all ports are output mode 0; all ports are input unchanged condition mode 2 mode 0; all ports are output mode 0; all ports are input unchanged condition ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of status flags present in 8085 microprocessor are 8 16 5 10 8 16 5 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST0 - RST7 are the __________ in 8085. conditional interrupts logical interrupts hardware interrupts software interrupts conditional interrupts logical interrupts hardware interrupts software interrupts ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Both the ALU and control section of CPU employ which special purpose storage location? Decoders Buffers Accumulators Registers Decoders Buffers Accumulators Registers ANSWER DOWNLOAD EXAMIANS APP
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