Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Sets Clears Can not change Complements Sets Clears Can not change Complements ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, all flags will be affected only carry and zero flags will be affected no flags will be affected only carry flag will be affected all flags will be affected only carry and zero flags will be affected no flags will be affected only carry flag will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 sets zero and carry flags reset carry and sign flags sets zero and sign flags reset zero and parity flags sets zero and carry flags reset carry and sign flags sets zero and sign flags reset zero and parity flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not true during the execution of an interrupt service routine, which does not contain any EI instructions the microprocessor cannot be interrupted by any mask able interrupt the microprocessor cannot be interrupted by any interrupt all interrupts except non-maskable interrupt are disabled the microprocessor can be interrupted by a non-mask able interrupt the microprocessor cannot be interrupted by any mask able interrupt the microprocessor cannot be interrupted by any interrupt all interrupts except non-maskable interrupt are disabled the microprocessor can be interrupted by a non-mask able interrupt ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The clock speed of 8085 is 1KHz. 1MHz. 3.2MHz. 3.2KHz. 1KHz. 1MHz. 3.2MHz. 3.2KHz. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An e-mail message can be sent to many recipients. True False True False ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS