Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Can not change Sets Complements Clears Can not change Sets Complements Clears ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Direct Register Immediate Implicit Direct Register Immediate Implicit ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The relation among IC (Instruction Cycle), FC (Fetch cycle) and EC (Execute Cycle) is IC = FC + EC IC = FC + 2EC IC = FC - EC EC = IC + FC IC = FC + EC IC = FC + 2EC IC = FC - EC EC = IC + FC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following statements: Arithmetic Logic Unit (ALU) 1.Performs arithmetic operations 2.Performs comparisons. 3.Communicates with I/O devices 4.Keeps watch on the system Which of these statements are correct? 1, 2, 3 and 4 1, 2 and 3 1 and 2 only 3 and 4 only 1, 2, 3 and 4 1, 2 and 3 1 and 2 only 3 and 4 only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If m is a power of 2, the number of select lines required for an m-input mux is: log2 (m) 2*m 2^m m log2 (m) 2*m 2^m m ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many segments are there in 8086? 6. 3. 4. 2. 6. 3. 4. 2. ANSWER DOWNLOAD EXAMIANS APP
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