Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Clears Can not change Complements Sets Clears Can not change Complements Sets ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 RST 6.5 both ‘a’ and ‘b’ TRAP RST 5.5 RST 6.5 both ‘a’ and ‘b’ TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Because we wish to allow each ASCII code to occupy one location in memory, most memories are __________ addressable. DOUBLEWORD (32 bits) BYTE WORD (16 bits) NIBBLE DOUBLEWORD (32 bits) BYTE WORD (16 bits) NIBBLE ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack is nothing but a set of reserved ROM address space reserved RAM address space reserved I/O address space None of these reserved ROM address space reserved RAM address space reserved I/O address space None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which instruction is required to rotate the content of accumulator one bit right along with carry? RLC RAR RAL RRC RLC RAR RAL RRC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor which one of the following statement is wrong there is a pin available for serial input serial I/O is not possible serial I/O is possible through SIM and RIM instruction there is a pin available for serial output there is a pin available for serial input serial I/O is not possible serial I/O is possible through SIM and RIM instruction there is a pin available for serial output ANSWER DOWNLOAD EXAMIANS APP
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