Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Complements Clears Sets Can not change Complements Clears Sets Can not change ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. Both A & R are true and R is the correct explanation of A. A is false but R is true. Both A & R are true but R is not the correct explanation of A . A is true but R is false. Both A & R are true and R is the correct explanation of A. A is false but R is true. Both A & R are true but R is not the correct explanation of A . A is true but R is false. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 5.5 TRAP RST 6.5 both ‘a’ and ‘b’ RST 5.5 TRAP RST 6.5 both ‘a’ and ‘b’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following ICs is used to interface keyboard and display? 8251 8259 8279 8253 8251 8259 8279 8253 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. RST 5.5 RST 7 INTR TRAP RST 5.5 RST 7 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
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