Microprocessor The relation among IC (Instruction Cycle), FC (Fetch cycle) and EC (Execute Cycle) is IC = FC - EC IC = FC + EC EC = IC + FC IC = FC + 2EC IC = FC - EC IC = FC + EC EC = IC + FC IC = FC + 2EC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. B-C PSW D-E Stack Pointer B-C PSW D-E Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using DeMorgan’s Theorem we can convert any AND-OR structure into NOR-NAND OR-NAND NAND-NAND NAND-NOR NOR-NAND OR-NAND NAND-NAND NAND-NOR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor For a memory with a 16-bit address space, the addressability is 2^16 bits 8 bits 16 bits Cannot be determined 2^16 bits 8 bits 16 bits Cannot be determined ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Halves Doubles Remains unchanged Increases by 2^(address bits)/addressability Halves Doubles Remains unchanged Increases by 2^(address bits)/addressability ANSWER DOWNLOAD EXAMIANS APP
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