Microprocessor The relation among IC (Instruction Cycle), FC (Fetch cycle) and EC (Execute Cycle) is EC = IC + FC IC = FC - EC IC = FC + 2EC IC = FC + EC EC = IC + FC IC = FC - EC IC = FC + 2EC IC = FC + EC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The multiplexing of address bus and data buses is used in none of these. depends on the internal architecture. all the microprocessors. never multiplexed. none of these. depends on the internal architecture. all the microprocessors. never multiplexed. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations 0FFE H and 0FFF H 1000 H and 1001 H 1000 H and 0FFF H 0FFF H and 0FFE H 0FFE H and 0FFF H 1000 H and 1001 H 1000 H and 0FFF H 0FFF H and 0FFE H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. Both A & R are true but R is not the correct explanation of A . Both A & R are true and R is the correct explanation of A. A is true but R is false. A is false but R is true. Both A & R are true but R is not the correct explanation of A . Both A & R are true and R is the correct explanation of A. A is true but R is false. A is false but R is true. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following pair of gates can form a latch? A cross coupled NAND/OR A pair of cross copled AND A pair of cross coupled OR A pair of cross coupled NAND A cross coupled NAND/OR A pair of cross copled AND A pair of cross coupled OR A pair of cross coupled NAND ANSWER DOWNLOAD EXAMIANS APP
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