Microprocessor The output data lines of microprocessor and memories are usually tristated because The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time More than one device can transmit information over the data bus by enabling only one device at a time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A high on RESET OUT signifies that all the registers and counters are being reset processing can begin when this signal goes high all the registers and counters are being reset and this signal can be used to reset external support chip all the registers of the CPU are being reset all the registers and counters are being reset processing can begin when this signal goes high all the registers and counters are being reset and this signal can be used to reset external support chip all the registers of the CPU are being reset ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What are the sets of commands in a program which are not translated into machine instructions during assembly process, called? Mnemonics Directives Operands Identifiers Mnemonics Directives Operands Identifiers ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, in response to RST 7.5 interrupts the execution is transferred to memory location 002CH 0034H 0000H 003CH 002CH 0034H 0000H 003CH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operating modes of 8255 A are called Mode 0, mode 2 and mode 3 Mode 0 and mode 2 Mode 0 and mode 1 Mode 0, mode 1 and mode 2 Mode 0, mode 2 and mode 3 Mode 0 and mode 2 Mode 0 and mode 1 Mode 0, mode 1 and mode 2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache and main memory Main memory and I/O devices Two I/O devices Cache memory and I/O devices Cache and main memory Main memory and I/O devices Two I/O devices Cache memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
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