Microprocessor The output data lines of microprocessor and memories are usually tristated because It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output It increases the speed of data transfer over the data bus More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which language could be used for programming an FPGA. VHDL Both A and B Verilog None VHDL Both A and B Verilog None ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? RST 6.5 RST 5.5 both ‘a’ and ‘b’ TRAP RST 6.5 RST 5.5 both ‘a’ and ‘b’ TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor is ALU and control unit on a single chip. register unit and control unit on a single chip. and memory on a single chip. register unit and I/O device on a single chip. and control unit on a single chip. register unit and control unit on a single chip. and memory on a single chip. register unit and I/O device on a single chip. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XCHG & DAD H PCHL & DAD D XTHL & DAD H XCHG & DAD B XCHG & DAD H PCHL & DAD D XTHL & DAD H XCHG & DAD B ANSWER DOWNLOAD EXAMIANS APP
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