Microprocessor The output data lines of microprocessor and memories are usually tristated because It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following statement is false? A microprocessor has an ALU A microprocessor has bi-directional address bus A microprocessor has bi-directional data bus A microprocessor has unidirectional address bus A microprocessor has an ALU A microprocessor has bi-directional address bus A microprocessor has bi-directional data bus A microprocessor has unidirectional address bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to complement the lower nibble of accumulator one can use ORI 0FH ANI 0FH XRI 0FH CMA ORI 0FH ANI 0FH XRI 0FH CMA ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Bus Interface Unit (BIU) in 8086 performs the following functions: Instruction decoding. Arithmatic and Logic operations. All the above. Instruction fetch. Instruction decoding. Arithmatic and Logic operations. All the above. Instruction fetch. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of register C be 00000000 before the instruction DCR C is executed. The content of register C after the after the execution of this instruction will be 00000001 None 00000000 11111111 00000001 None 00000000 11111111 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. transferred to memory address register . transferred to memory data register. transferred to address bus. incremented by one. ANSWER DOWNLOAD EXAMIANS APP
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