Microprocessor The microprocessor issues ALE during first T-state of fetch cycle only every machine cycle memory WRITE cycle only memory READ cycle only fetch cycle only every machine cycle memory WRITE cycle only memory READ cycle only ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The data lines of 8085 microprocessor are multiplexed with higher order address lines status lines None of these lower order address lines higher order address lines status lines None of these lower order address lines ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The five flags in 8085 are designated as Z, CY, S, P and AC D, Z, S, P, AC Z, CY, S, D, AC Z, C, S, P, AC Z, CY, S, P and AC D, Z, S, P, AC Z, CY, S, D, AC Z, C, S, P, AC ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A combinational PLD with a programmable AND array and a programmable OR array is called a PLD PAL PLA PROM PLD PAL PLA PROM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many machine cycles are required for execution of IN 30H instruction 4 6 5 3 4 6 5 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Monostablemultivibrators (IC74121) are used in a microprocessor based system for frequency measurement. Reason(R): Microprocessor counts the number of interrupt signals/second or within a specified interval through ISR. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. A is true but R is false. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is false but R is true. ANSWER DOWNLOAD EXAMIANS APP
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