Microprocessor While INX B instruction execute, all flags will be affected only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected only carry and zero flags will be affected only carry flag will be affected no flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A mask programmed ROM is programmed by the user erasable and programmable programmed at the time of fabrication erasable electrically programmed by the user erasable and programmable programmed at the time of fabrication erasable electrically ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache memory and I/O devices Two I/O devices Main memory and I/O devices Cache and main memory Cache memory and I/O devices Two I/O devices Main memory and I/O devices Cache and main memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always reset always set affected indicating specific conditions not affected always reset always set affected indicating specific conditions not affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a microprocessor based system the stack is always in microprocessor ROM RAM EPROM microprocessor ROM RAM EPROM ANSWER DOWNLOAD EXAMIANS APP
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