Microprocessor While INX B instruction execute, all flags will be affected no flags will be affected only carry flag will be affected only carry and zero flags will be affected all flags will be affected no flags will be affected only carry flag will be affected only carry and zero flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST0 - RST7 are the __________ in 8085. hardware interrupts software interrupts logical interrupts conditional interrupts hardware interrupts software interrupts logical interrupts conditional interrupts ANSWER DOWNLOAD EXAMIANS APP
Microprocessor CALL instruction is a ______ instruction. 4 bytes 3 bytes 1 bytes 2 bytes 4 bytes 3 bytes 1 bytes 2 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI 0FH ANI OFH ANI F0H XRI FOH XRI 0FH ANI OFH ANI F0H XRI FOH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T3 OP code fetch T1 OP code fetch T2 OP code fetch T4 OP code fetch T3 OP code fetch T1 OP code fetch T2 OP code fetch T4 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A number of 1-bit registers used in microprocessors to indicate certain conditions are usually referred to as flags counters shift registers latches flags counters shift registers latches ANSWER DOWNLOAD EXAMIANS APP
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