Microprocessor The number of status flags present in 8085 microprocessor are 16 5 8 10 16 5 8 10 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Monostablemultivibrators (IC74121) are used in a microprocessor based system for frequency measurement. Reason(R): Microprocessor counts the number of interrupt signals/second or within a specified interval through ISR. A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A. A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Inintel 8085A microprocessor ALE signal is made high to To disable data bus To achieve all the functions listed above To latch data D0-D7 from data bus Enable the data bus to be used as low order address bus To disable data bus To achieve all the functions listed above To latch data D0-D7 from data bus Enable the data bus to be used as low order address bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
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