Microprocessor The addressing mode in instruction PUSH B is register immediate direct register indirect register immediate direct register indirect ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Temporary registers in 8085 are W and Z. D and E. H and L. B and C. W and Z. D and E. H and L. B and C. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The microprocessor may be made to exit from HALT state by asserting any of the five interrupt lines READY line RESTART A or B or HOLD line any of the five interrupt lines READY line RESTART A or B or HOLD line ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor differentiates between op code, data/address at any time by the program counter its internal registers the stack pointer the sequence in which memory contents are fetched by it the program counter its internal registers the stack pointer the sequence in which memory contents are fetched by it ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
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