Microprocessor The minimum number of transistors required to implement a two input AND gate is 8 6 4 2 8 6 4 2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8259 8279 8257 8275 8259 8279 8257 8275 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode Both Ihe numbers are changed and their exponents are, made equal to -5 .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed None of the numbers is changed .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed Both Ihe numbers are changed and their exponents are, made equal to -5 .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed None of the numbers is changed .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line. SIM DI RIM EI SIM DI RIM EI ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Mux Gate Register Decoder Mux Gate Register Decoder ANSWER DOWNLOAD EXAMIANS APP
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