Microprocessor Pick up the programmable interrupt controller from the following 8257 8279 8275 8259 8257 8279 8275 8259 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following pair of gates can form a latch? A pair of cross coupled NAND A cross coupled NAND/OR A pair of cross coupled OR A pair of cross copled AND A pair of cross coupled NAND A cross coupled NAND/OR A pair of cross coupled OR A pair of cross copled AND ANSWER DOWNLOAD EXAMIANS APP
Microprocessor XCHG instruction exchanges the content of H-L with ______ register pair. Stack Pointer B-C PSW D-E Stack Pointer B-C PSW D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, only carry and zero flags will be affected all flags will be affected only carry flag will be affected no flags will be affected only carry and zero flags will be affected all flags will be affected only carry flag will be affected no flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Bus Interface Unit (BIU) in 8086 performs the following functions: All the above. Arithmatic and Logic operations. Instruction decoding. Instruction fetch. All the above. Arithmatic and Logic operations. Instruction decoding. Instruction fetch. ANSWER DOWNLOAD EXAMIANS APP
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