Microprocessor Register pair used to indicate memory W and Z H and L D and E B and C W and Z H and L D and E B and C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The number of hardware interrupts present in 8085 microprocessor are 5 8 10 16 5 8 10 16 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following registers: 1. Accumulator and flag register 2. B and C register 3. D and E register 4. H and L register Which of these 8-bit registers of 8085 microprocessor can be paired together to make a 16-bit register? 1, 3 and 4 1, 2 and 4 2, 3 and 4 1, 2 and 3 1, 3 and 4 1, 2 and 4 2, 3 and 4 1, 2 and 3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How many segments are there in 8086? 2. 3. 6. 4. 2. 3. 6. 4. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Pick up the programmable interrupt controller from the following 8257 8259 8275 8279 8257 8259 8275 8279 ANSWER DOWNLOAD EXAMIANS APP
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