Microprocessor Register pair used to indicate memory H and L W and Z B and C D and E H and L W and Z B and C D and E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor For a memory with a 16-bit address space, the addressability is Cannot be determined 2^16 bits 8 bits 16 bits Cannot be determined 2^16 bits 8 bits 16 bits ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor CALL instruction is a ______ instruction. 3 bytes 4 bytes 1 bytes 2 bytes 3 bytes 4 bytes 1 bytes 2 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An I/O read cycle A memory write cycle A memory read cycle An op-code fetch cycle An I/O read cycle A memory write cycle A memory read cycle An op-code fetch cycle ANSWER DOWNLOAD EXAMIANS APP
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