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Microprocessor

Microprocessor
In a microprocessor based system the stack is always in

 microprocessor
 ROM
 RAM
 EPROM

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Microprocessor
RST0 - RST7 are the __________ in 8085.

 conditional interrupts
 software interrupts
 logical interrupts
 hardware interrupts

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Microprocessor
Of the following circuits, the one which involves storage is

Mux
Decoder
RS Latch
Nand

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Microprocessor
During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?

 T1 OP code fetch
 T2 OP code fetch
 T3 OP code fetch
 T4 OP code fetch

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Microprocessor
When an 8085 microprocessor is reset, the address bus contains

 0000H
 0043H
 002CH
 003CH

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Microprocessor
Which of the following interrupt is both level and edge sensitive?

 TRAP
 INTR
 RST 5.5
 RST 7.5

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