Microprocessor Identify the programmable DMA controller from the following 8251 8257 8253 8279 8251 8257 8253 8279 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is negated R is negated, S is asserted R is asserted, S is asserted R is asserted, S is negated R is negated, S is negated R is negated, S is asserted R is asserted, S is asserted R is asserted, S is negated ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 which addressing mode is also called inherent addressing? Register Immediate Direct Implicit Register Immediate Direct Implicit ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following interrupt is both level and edge sensitive? RST 5.5 RST 7.5 TRAP INTR RST 5.5 RST 7.5 TRAP INTR ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) same as the content of A7-A0 irrelevant all bits set (i.e. FFH) all bits reset (i.e. 00H) same as the content of A7-A0 irrelevant all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The interrupt facility is provided in microprocessor to change the sequence of the instructions being executed keep a control on the working of the microprocessor stop the microprocessor when it starts malfunctioning stop the microprocessor when desired change the sequence of the instructions being executed keep a control on the working of the microprocessor stop the microprocessor when it starts malfunctioning stop the microprocessor when desired ANSWER DOWNLOAD EXAMIANS APP
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