Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 4 2, 3, 5 1, 3, 5 1, 2, 5 1, 3, 4 2, 3, 5 1, 3, 5 1, 2, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor which one of the following statement is wrong serial I/O is possible through SIM and RIM instruction serial I/O is not possible there is a pin available for serial input there is a pin available for serial output serial I/O is possible through SIM and RIM instruction serial I/O is not possible there is a pin available for serial input there is a pin available for serial output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “1” and remaining bits with “0”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The 8085 microprocessor enters into bus idle machine cycle whenever None of these INTR interrupt is recognized RST 7.5 is recognized DAD RP instruction is executed None of these INTR interrupt is recognized RST 7.5 is recognized DAD RP instruction is executed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time It increases the speed of data transfer over the data bus More than one device can transmit over the data bus at the same time The data line can be multiplexed for both input and output ANSWER DOWNLOAD EXAMIANS APP
Microprocessor HLT opcode means end of program. store result in memory. load data to accumulator. load accumulator with contents of register. end of program. store result in memory. load data to accumulator. load accumulator with contents of register. ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS