Microprocessor
Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor?

 1, 3, 5
 1, 2, 5
 1, 3, 4
 2, 3, 5

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Microprocessor
Cycle stealing mode of DMA operation involves

 Data transfer takes place between the I/O device and memory during every alternate clock cycle
 The DMA control waiting for the microprocessor to finish execution of the program and then takes over the buses
 DMA controller taking over the address, data and control buses while a block of data is transferred between memory and I/O device
 While the microprocessor is executing a program an interface circuit takes over control of address, data, control buses when not in use by microprocessor

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Microprocessor
In 8085 microprocessor system with memory mapped I/O, which of the following is true?

 Devices have 8-bit address line
 Devices are accessed using IN and OUT instructions
 There can be maximum of 256 input devices and 256 output devices
 Arithmetic and logic operations can be directly performed with the I/O data

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Microprocessor
The output data lines of microprocessor and memories are usually tristated because

 It increases the speed of data transfer over the data bus
 The data line can be multiplexed for both input and output
 More than one device can transmit over the data bus at the same time
 More than one device can transmit information over the data bus by enabling only one device at a time

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Microprocessor
In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location

 2001H and 2000H to H and L registers respectively
 2001H and 2002H to H and L registers respectively
 2000H and 1FFFH to H and L registers respectively
 2000H and 1999H to H and L registers respectively

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