Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? Devices are accessed using IN and OUT instructions Arithmetic and logic operations can be directly performed with the I/O data There can be maximum of 256 input devices and 256 output devices Devices have 8-bit address line Devices are accessed using IN and OUT instructions Arithmetic and logic operations can be directly performed with the I/O data There can be maximum of 256 input devices and 256 output devices Devices have 8-bit address line ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The stack is nothing but a set of reserved ROM address space None of these reserved RAM address space reserved I/O address space reserved ROM address space None of these reserved RAM address space reserved I/O address space ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are always set always reset not affected affected indicating specific conditions always set always reset not affected affected indicating specific conditions ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The minimum number of transistors required to implement a two input AND gate is 4 6 8 2 4 6 8 2 ANSWER DOWNLOAD EXAMIANS APP
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