Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch T4 OP code fetch T3 OP code fetch T2 OP code fetch T1 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2002H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1999H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a microcomputer , the address of memory locations are binary numbers that identify each memory circuit where a byte is stored. If a microcomputer uses 20-bit address, then numbers of different memory locations are 220 20 220 - 1 220-1 220 20 220 - 1 220-1 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Total number of modes the 8253 can work 6 8 4 12 6 8 4 12 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? Program Counter. H-L. D-E. Stack Pointer. Program Counter. H-L. D-E. Stack Pointer. ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS