Microprocessor Assertion (A): Each memory chip has its own address latch. Reason (R): ALE signal comes out of microprocessor 8085 and goes to memory chip. Both A and R are correct but R is not correct explanation of A A is correct R is wrong Both A and R are correct and R is correct explanation of A A is wrong R is correct Both A and R are correct but R is not correct explanation of A A is correct R is wrong Both A and R are correct and R is correct explanation of A A is wrong R is correct ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following is not a general purpose peripheral? Programmable interval timer Programmable interrupt controller Programmable CRT controller I/O port Programmable interval timer Programmable interrupt controller Programmable CRT controller I/O port ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which language could be used for programming an FPGA. Both A and B None VHDL Verilog Both A and B None VHDL Verilog ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T1 & T2 T2 & T3 T4 & T1 T3 & T4 T1 & T2 T2 & T3 T4 & T1 ANSWER DOWNLOAD EXAMIANS APP
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