Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional Both A & R are true and R is the correct explanation of A A is false but R is true A is true but R is false Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A A is false but R is true A is true but R is false Both A & R are true but R is not the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While STC instruction executes, only carry flag will be affected. only carry and zero flags will be affected. all flags will be affected. no flags will be affected. only carry flag will be affected. only carry and zero flags will be affected. all flags will be affected. no flags will be affected. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following instruction will never affect the zero flag? XRA R ORA R DCX Rp DCR R XRA R ORA R DCX Rp DCR R ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When .9432 E – 4 is subtracted from .5452 E – 3 in normalized floating point mode .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed Both Ihe numbers are changed and their exponents are, made equal to -5 .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed None of the numbers is changed .9432 E – 4 is changed to .09432 E – 3 and .5452 E – 3 is not changed Both Ihe numbers are changed and their exponents are, made equal to -5 .5452 E – 3 is changed to 5.452 E – 4 but .9432 E – 4 is not changed None of the numbers is changed ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to complement the lower nibble of accumulator one can use CMA ORI 0FH ANI 0FH XRI 0FH CMA ORI 0FH ANI 0FH XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST0 - RST7 are the __________ in 8085. logical interrupts software interrupts hardware interrupts conditional interrupts logical interrupts software interrupts hardware interrupts conditional interrupts ANSWER DOWNLOAD EXAMIANS APP
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