Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A A is true but R is false Both A & R are true but R is not the correct explanation of A A is false but R is true Both A & R are true and R is the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following instruction will never affect the zero flag? ORA R XRA R DCR R DCX Rp ORA R XRA R DCR R DCX Rp ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to save accumulator value on the stack, which of the following instruction may be used PUSH PSW POP PSW PUSH SP PUSH A PUSH PSW POP PSW PUSH SP PUSH A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Consider the following I) Sign flag II) Trap flag III) Parity flag IV) Auxiliary carry flag. Which one of the above flags is/are present in 8085 microprocessor? (I) only (II) & (III) (I) & (II) (I) ,(III) & (IV) (I) only (II) & (III) (I) & (II) (I) ,(III) & (IV) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The ROM programmed during manufacturing process itself is called EPROM PROM EEPROM MROM EPROM PROM EEPROM MROM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor At the beginning of a fetch cycle, the contents of the program counter are incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . incremented by one. transferred to address bus. transferred to memory data register. transferred to memory address register . ANSWER DOWNLOAD EXAMIANS APP
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