Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional A is true but R is false A is false but R is true Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A A is true but R is false A is false but R is true Both A & R are true but R is not the correct explanation of A Both A & R are true and R is the correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A 37 bit mantissa has an accuracy of 6 decimal places 8 decimal places 11 decimal places 10 decimal places 6 decimal places 8 decimal places 11 decimal places 10 decimal places ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A sequence of two registers that multiplies the content of DE register pair by two and stores the result in HL register pair (in 8085 assembly language) is XCHG & DAD B XTHL & DAD H PCHL & DAD D XCHG & DAD H XCHG & DAD B XTHL & DAD H PCHL & DAD D XCHG & DAD H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. B-C PSW D-E Stack Pointer B-C PSW D-E Stack Pointer ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 1 K bytes 4 K bytes 10 K bytes 8 K bytes 1 K bytes 4 K bytes 10 K bytes 8 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. RST 5.5 RST 7 INTR TRAP RST 5.5 RST 7 INTR TRAP ANSWER DOWNLOAD EXAMIANS APP
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