Microprocessor Assertion(A): Address bus is unidirectional. Reason(R): Data bus is bidirectional Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false Both A & R are true and R is the correct explanation of A A is false but R is true Both A & R are true but R is not the correct explanation of A A is true but R is false ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve one byte of memory Forces the assembler to reserve a specified number of consecutive bytes in the memory None of these Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve one byte of memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 4. 2. 3. 6. 4. 2. 3. 6. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following circuits transmits two messages simultaneously in one direction Diplex Quadruplex Duplex Simplex Diplex Quadruplex Duplex Simplex ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle An op-code fetch cycle A memory write cycle A memory read cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The register which holds the information about the nature of results of arithmetic and logic operations is called as Accumulator Condition code register Process status register Flag register Accumulator Condition code register Process status register Flag register ANSWER DOWNLOAD EXAMIANS APP
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