Microprocessor A microprocessor with a 12-bit address bus will be able to access 10 K bytes 1 K bytes 4 K bytes 8 K bytes 10 K bytes 1 K bytes 4 K bytes 8 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are irrelevant all bits reset (i.e. 00H) same as the content of A7-A0 all bits set (i.e. FFH) irrelevant all bits reset (i.e. 00H) same as the content of A7-A0 all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following? Memory cycle Instruction cycle Clock cycle Machine cycle Memory cycle Instruction cycle Clock cycle Machine cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The interrupt facility is provided in microprocessor to keep a control on the working of the microprocessor stop the microprocessor when it starts malfunctioning change the sequence of the instructions being executed stop the microprocessor when desired keep a control on the working of the microprocessor stop the microprocessor when it starts malfunctioning change the sequence of the instructions being executed stop the microprocessor when desired ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has even parity P flag is reset when the result has odd parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always An I/O read cycle A fetch cycle A memory read cycle A memory write cycle An I/O read cycle A fetch cycle A memory read cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
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