Microprocessor Which of the following instruction will never affect the zero flag? DCX Rp DCR R XRA R ORA R DCX Rp DCR R XRA R ORA R ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Increases by 2^(address bits)/addressability Remains unchanged Doubles Halves Increases by 2^(address bits)/addressability Remains unchanged Doubles Halves ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is mean by ALU Arithmetic logic unsigned Arithmetic local unsigned Arithmetic logic unit Arithmetic logic upgrade Arithmetic logic unsigned Arithmetic local unsigned Arithmetic logic unit Arithmetic logic upgrade ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a C expression using assignment operators, relational operators and arithmetic operators, the hierarchy of operations (in the absence of parenthesis) is Arithmetic, relational, assignment Arithmetic, assignment, relational Assignment, relational, arithmetic Relational, assignment, arithmetic Arithmetic, relational, assignment Arithmetic, assignment, relational Assignment, relational, arithmetic Relational, assignment, arithmetic ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Neither A nor B Either A or B Processor is capable of waiting External buffer is used Neither A nor B Either A or B Processor is capable of waiting External buffer is used ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS