Microprocessor Which of the following instruction will never affect the zero flag? XRA R ORA R DCR R DCX Rp XRA R ORA R DCR R DCX Rp ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The address bus width of a microprocessor which is capable of addressing 64 Kbytes of the memory is 16 8 20 12 16 8 20 12 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is negated, S is negated R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted R is negated, S is negated R is negated, S is asserted R is asserted, S is negated R is asserted, S is asserted ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which memory has read operation, byte erase, byte write and chip erase? RAM EEPROM Both B and C UVEPROM RAM EEPROM Both B and C UVEPROM ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) same as the content of A7-A0 all bits reset (i.e. 00H) irrelevant all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The relation among IC (Instruction Cycle), FC (Fetch cycle) and EC (Execute Cycle) is EC = IC + FC IC = FC - EC IC = FC + EC IC = FC + 2EC EC = IC + FC IC = FC - EC IC = FC + EC IC = FC + 2EC ANSWER DOWNLOAD EXAMIANS APP
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