Microprocessor Which of the following instruction will never affect the zero flag? XRA R DCR R ORA R DCX Rp XRA R DCR R ORA R DCX Rp ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) Both ‘b’ and ‘c’ Bus Interface Unit (BIU) None of these Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor is ALU and memory on a single chip. register unit and control unit on a single chip. and control unit on a single chip. register unit and I/O device on a single chip. and memory on a single chip. register unit and control unit on a single chip. and control unit on a single chip. register unit and I/O device on a single chip. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microprocessor with a 12-bit address bus will be able to access 4 K bytes 10 K bytes 8 K bytes 1 K bytes 4 K bytes 10 K bytes 8 K bytes 1 K bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SUB A instruction in 8085 reset zero and parity flags sets zero and sign flags sets zero and carry flags reset carry and sign flags reset zero and parity flags sets zero and sign flags sets zero and carry flags reset carry and sign flags ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What are the sets of commands in a program which are not translated into machine instructions during assembly process, called? Identifiers Directives Operands Mnemonics Identifiers Directives Operands Mnemonics ANSWER DOWNLOAD EXAMIANS APP