Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 3. 6. 4. 2. 3. 6. 4. 2. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor RST 3 instruction will cause the processor to branch to the location 0018H 0000H 0024H 0028H 0018H 0000H 0024H 0028H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The program counter in a 8085 micro-processor is a 16-bit register, because It has to fetch two 8-bit data at a time There are 16 address lines It counts 16-bits at a time It facilitates the user storing 16-bit data temporarily It has to fetch two 8-bit data at a time There are 16 address lines It counts 16-bits at a time It facilitates the user storing 16-bit data temporarily ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Segment override prefix (SOP) is used when a default offset register is not used with its default base segment register but with a different base register. Reason(R): The offset registers IP and SP can never be associated with any other segment registers apart from their respective default segments. A is false but R is true. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is true but R is false. A is false but R is true. Both A & R are true and R is the correct explanation of A. Both A & R are true but R is not the correct explanation of A. A is true but R is false. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A single instruction to clear the lower nibble of accumulator in 8085 language assembly is XRI FOH ANI OFH ANI F0H XRI 0FH XRI FOH ANI OFH ANI F0H XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always An I/O read cycle A fetch cycle A memory read cycle A memory write cycle An I/O read cycle A fetch cycle A memory read cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS