Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 4. 6. 2. 3. 4. 6. 2. 3. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During the execution of the instruction, the ________tests the status and control flags and updates them based on the results of executing the instruction. None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘c’ and ‘d’ None of these Execution Unit (EU) Bus Interface Unit (BIU) Both ‘c’ and ‘d’ ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The program counter in a 8085 micro-processor is a 16-bit register, because There are 16 address lines It has to fetch two 8-bit data at a time It facilitates the user storing 16-bit data temporarily It counts 16-bits at a time There are 16 address lines It has to fetch two 8-bit data at a time It facilitates the user storing 16-bit data temporarily It counts 16-bits at a time ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DS directive in 8085 Forces the assembler to reserve one byte of memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory Forces the assembler to reserve one byte of memory None of these Forces the assembler to reserve a specified number of consecutive bytes in the memory Forces the assembler to reserve a specified number of bytes in the memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T3 OP code fetch T2 OP code fetch T4 OP code fetch T1 OP code fetch T3 OP code fetch T2 OP code fetch T4 OP code fetch T1 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which instruction is required to rotate the content of accumulator one bit right along with carry? RRC RAR RLC RAL RRC RAR RLC RAL ANSWER DOWNLOAD EXAMIANS APP
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