Microprocessor We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete Set of {EXOR, NOT} Set of {AND,OR,NOT} None of these Set of {AND,OR} Set of {EXOR, NOT} Set of {AND,OR,NOT} None of these Set of {AND,OR} ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In a vector interrupt the branch address is obtained from a register in the processor. the branch address is assigned to a fixed location in memory. none. the interrupting source supplies the branch information to the processor through an interrupt vector. the branch address is obtained from a register in the processor. the branch address is assigned to a fixed location in memory. none. the interrupting source supplies the branch information to the processor through an interrupt vector. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Decoder Mux Register Gate Decoder Mux Register Gate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is the size (in bytes) of Prefetch queue in 8086? 6. 2. 4. 3. 6. 2. 4. 3. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Let the content of accumulator and register B be 0000 0100 and 0100 0000 respectively before execution of instruction SUB B. The content of accumulator after the execution of this instruction will be 010001000 00000100 01000000 11000100 010001000 00000100 01000000 11000100 ANSWER DOWNLOAD EXAMIANS APP
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