Microprocessor We say that a set of gates is logically complete if we can build any circuit without using any other kind of gates. Which of the following sets are logically complete Set of {AND,OR,NOT} Set of {AND,OR} Set of {EXOR, NOT} None of these Set of {AND,OR,NOT} Set of {AND,OR} Set of {EXOR, NOT} None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A microcomputer consists of I/O device All of these a microprocessor memory I/O device All of these a microprocessor memory ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When referring to instruction words, a mnemonic is a short abbreviation for the data word stored at the operand address. a short abbreviation for the operand address. shorthand for machine language. a short abbreviation for the operation to be performed. a short abbreviation for the data word stored at the operand address. a short abbreviation for the operand address. shorthand for machine language. a short abbreviation for the operation to be performed. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The length of bus cycle in 8086/8088 is four clock cycles, T1, T2, T3, T4 and an indeterminate number of wait state clock cycles denoted by Tw. The wait states are always inserted between T3 & T4 T4 & T1 T2 & T3 T1 & T2 T3 & T4 T4 & T1 T2 & T3 T1 & T2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The first machine cycle of an instruction is always An I/O read cycle A memory read cycle A fetch cycle A memory write cycle An I/O read cycle A memory read cycle A fetch cycle A memory write cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) ANSWER DOWNLOAD EXAMIANS APP
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