Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Increases by 2^(address bits)/addressability Doubles Halves Remains unchanged Increases by 2^(address bits)/addressability Doubles Halves Remains unchanged ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A structure that stores a number of bits taken “together as a unit” is a Mux Decoder Register Gate Mux Decoder Register Gate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor After RESET 8255 will be in mode 0; all ports are output unchanged condition mode 0; all ports are input mode 2 mode 0; all ports are output unchanged condition mode 0; all ports are input mode 2 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion (A): Negative values of incremental operator in DO loop are allowed in Fortran 77 but not in earlier versions of Fortran. Reason (R): Fortran 77 has better array facilities than earlier versions of Fortran. A is correct R is wrong A is wrong R is correct Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A A is correct R is wrong A is wrong R is correct Both A and R are correct and R is correct explanation of A Both A and R are correct but R is not correct explanation of A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The operations executed by two or more control units are referred as Multi-operations Bi control-operations Micro-operations Macro-operations Multi-operations Bi control-operations Micro-operations Macro-operations ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When the write enable input is not asserted, the gated D latch _________ its output. Can not change Sets Complements Clears Can not change Sets Complements Clears ANSWER DOWNLOAD EXAMIANS APP
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