Microprocessor An I/O processor controls the flow of information between Cache memory and I/O devices Cache and main memory Two I/O devices Main memory and I/O devices Cache memory and I/O devices Cache and main memory Two I/O devices Main memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Doubles Remains unchanged Increases by 2^(address bits)/addressability Halves Doubles Remains unchanged Increases by 2^(address bits)/addressability Halves ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2001H and 2002H to H and L registers respectively 2000H and 1999H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ‘Burst refresh’ in DRAM is also called Distributed refresh Concentrated refresh None of these Hidden refresh Distributed refresh Concentrated refresh None of these Hidden refresh ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The execution of RST n instruction causes the stack pointer to decrement by two None of these remain unaffected increment by two decrement by two None of these remain unaffected increment by two ANSWER DOWNLOAD EXAMIANS APP
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