Microprocessor An I/O processor controls the flow of information between Two I/O devices Cache and main memory Main memory and I/O devices Cache memory and I/O devices Two I/O devices Cache and main memory Main memory and I/O devices Cache memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A mask programmed ROM is programmed by the user erasable electrically programmed at the time of fabrication erasable and programmable programmed by the user erasable electrically programmed at the time of fabrication erasable and programmable ANSWER DOWNLOAD EXAMIANS APP
Microprocessor When any data transfer instruction, to transfer the data from memory to microprocessor, is executed the condition flags are not affected always reset affected indicating specific conditions always set not affected always reset affected indicating specific conditions always set ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 1, 3, 5 1, 2, 5 2, 3, 5 1, 3, 4 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following instruction may be used to clear the accumulator content irrespective of its initial value? SUB A CLR A MOV A, 00H ORA A SUB A CLR A MOV A, 00H ORA A ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. To indicate to user that the microprocessor is working and is ready for use. ANSWER DOWNLOAD EXAMIANS APP
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