Microprocessor Identify the non-maskable interrupt from the following RST 7.5 RST 6.5 RST 5.5 RST 4.5 RST 7.5 RST 6.5 RST 5.5 RST 4.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assertion(A): Ready signal of microprocessor is used to detect whether a peripheral is ready for the data transfer or not. Reason(R): In the microprocessor during data transfer operations, the wait states are added by forcing the ready signal low. A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A . A is false but R is true. Both A & R are true and R is the correct explanation of A. A is true but R is false. Both A & R are true but R is not the correct explanation of A . ANSWER DOWNLOAD EXAMIANS APP
Microprocessor SPHL instruction copies the content of H-L register pair to the _________. Stack Pointer PSW B-C D-E Stack Pointer PSW B-C D-E ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Assuming LSB is at position 0 and MSB at position 7, which bit positions are not used (Undefined) in flag register of an 8085 microprocessor? 1, 3, 4 2, 3, 5 1, 3, 5 1, 2, 5 1, 3, 4 2, 3, 5 1, 3, 5 1, 2, 5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following statement is false? A microprocessor has bi-directional data bus A microprocessor has an ALU A microprocessor has unidirectional address bus A microprocessor has bi-directional address bus A microprocessor has bi-directional data bus A microprocessor has an ALU A microprocessor has unidirectional address bus A microprocessor has bi-directional address bus ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor based system maximum possible number of input/output devices can be connected using I/O mapped I/O technique is 65536 256 64 512 65536 256 64 512 ANSWER DOWNLOAD EXAMIANS APP
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