Power Electronics
Dynamic equalising circuit is useful

 to limit dV / dt of SCR.
 for voltage equalisation.
 to limit di / dt of SCR.
  both B and C.

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Power Electronics
In reverse blocking mode of a thyristor

 junction J3 is in forward bias and J1, J2 in reverse bias.
  junction J1, J3 is in reverse bias and J2 is in forward bias.
 junction J1 and J2 is in forward bias and J3 is in reverse bias.
 junction J2 is in reverse bias and J1, J3 is in forward bias.

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