Microprocessor Which of the following instruction is not possible in 8085? POP B POP PSW POP D POP 30 H POP B POP PSW POP D POP 30 H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions? Program Counter. Stack Pointer. D-E. H-L. Program Counter. Stack Pointer. D-E. H-L. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor A mask programmed ROM is erasable electrically erasable and programmable programmed by the user programmed at the time of fabrication erasable electrically erasable and programmable programmed by the user programmed at the time of fabrication ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these Both ‘b’ and ‘c’ Execution Unit (EU) Bus Interface Unit (BIU) None of these ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache and main memory Two I/O devices Main memory and I/O devices Cache memory and I/O devices Cache and main memory Two I/O devices Main memory and I/O devices Cache memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Length of the instruction POP D is 1 byte 4 byte 2 byte 3 byte 1 byte 4 byte 2 byte 3 byte ANSWER DOWNLOAD EXAMIANS APP