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Microprocessor

Microprocessor
Which of the following instruction is not possible in 8085?

 POP B
 POP PSW
 POP D
 POP 30 H

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Microprocessor
Which general register or general register pair is incremented/decremented by 2 during PUSH and POP instructions?

 Program Counter.
 Stack Pointer.
 D-E.
 H-L.

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Microprocessor
A mask programmed ROM is

 erasable electrically
 erasable and programmable
 programmed by the user
 programmed at the time of fabrication

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Microprocessor
In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture.

 Both ‘b’ and ‘c’
 Execution Unit (EU)
 Bus Interface Unit (BIU)
 None of these

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Microprocessor
An I/O processor controls the flow of information between

Cache and main memory
Two I/O devices
Main memory and I/O devices
Cache memory and I/O devices

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Microprocessor
Length of the instruction POP D is

 1 byte
 4 byte
 2 byte
 3 byte

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