Microprocessor Which of the following instruction is not possible in 8085? POP 30 H POP PSW POP D POP B POP 30 H POP PSW POP D POP B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8086, _______ uses a mechanism known as an instruction stream queue to implement a pipeline architecture. None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) None of these Bus Interface Unit (BIU) Both ‘b’ and ‘c’ Execution Unit (EU) ANSWER DOWNLOAD EXAMIANS APP
Microprocessor While INX B instruction execute, only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected only carry and zero flags will be affected only carry flag will be affected no flags will be affected all flags will be affected ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Program counter in a digital computer Counts the number of times the loops are executed. Counts the number of times a subroutine is called. Points the memory address of the next instruction to be fetched. Counts the numbers of programs run in the machine. Counts the number of times the loops are executed. Counts the number of times a subroutine is called. Points the memory address of the next instruction to be fetched. Counts the numbers of programs run in the machine. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor What is SIM? None of these. Sorting interrupt mask. Set interrupt mask. Select interrupt mask. None of these. Sorting interrupt mask. Set interrupt mask. Select interrupt mask. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor An I/O processor controls the flow of information between Cache and main memory Two I/O devices Cache memory and I/O devices Main memory and I/O devices Cache and main memory Two I/O devices Cache memory and I/O devices Main memory and I/O devices ANSWER DOWNLOAD EXAMIANS APP
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