Microprocessor Which of the following instruction is not possible in 8085? POP PSW POP B POP 30 H POP D POP PSW POP B POP 30 H POP D ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In order to complement the lower nibble of accumulator one can use ORI 0FH ANI 0FH CMA XRI 0FH ORI 0FH ANI 0FH CMA XRI 0FH ANSWER DOWNLOAD EXAMIANS APP
Microprocessor How can we make any bit of a register “0”? OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. OR that bit with “0” and remaining bits with “1”. AND that bit with “0” and remaining bits with “1”. OR that bit with “1” and remaining bits with “0”. AND that bit with “1” and remaining bits with “0”. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In microprocessor based system I/O ports are used to interface the I/P device only the O/P devices only all the I/O devices the I/O devices and memory chips the I/P device only the O/P devices only all the I/O devices the I/O devices and memory chips ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor, the RST6 instruction transfer programme execution to following location 0048H. 0024H. 0060H. 0030H. 0048H. 0024H. 0060H. 0030H. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The output data lines of microprocessor and memories are usually tristated because It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time It increases the speed of data transfer over the data bus The data line can be multiplexed for both input and output More than one device can transmit information over the data bus by enabling only one device at a time More than one device can transmit over the data bus at the same time ANSWER DOWNLOAD EXAMIANS APP
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