Digital Electronics When will be the output of an OR gate is LOW ? When all inputs are HIGH When any input is LOW When all input is LOW When any input is HIGH When all inputs are HIGH When any input is LOW When all input is LOW When any input is HIGH ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The maximum positive and negative numbers which can be represented in two’s complement form using n bits are respectively, +2n-1,-2n-1 +2n-1,-(2n-1+1) +(2n-1-1),-(2n-1-1) +(2n-1-1),-2n-1 +2n-1,-2n-1 +2n-1,-(2n-1+1) +(2n-1-1),-(2n-1-1) +(2n-1-1),-2n-1 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The inputs of a NAND gate are connected together. The resulting circuit is ___________. AND gate NOT gate None of these OR gate AND gate NOT gate None of these OR gate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A 15-bit Hamming code requires none of these. 4 parity bits 15 parity bits 5 parity bits none of these. 4 parity bits 15 parity bits 5 parity bits ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In flip flop clock is present but in latch clock is none. present always. absent always. may be present/absent. none. present always. absent always. may be present/absent. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics If clock time period is 1ms, what is its frequency 1 kHz 1 MHz None of these 1 mHz 1 kHz 1 MHz None of these 1 mHz ANSWER DOWNLOAD EXAMIANS APP
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