Digital Electronics When will be the output of a NOT gate is LOW ? the input is LOW. the input is HIGH. the input is HIGH and LOW. None of these the input is LOW. the input is HIGH. the input is HIGH and LOW. None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which logic family provide minimum power dissipation ECL TTL JFET CMOS ECL TTL JFET CMOS ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The 2s complement of 17 is 101111. 110001. 111110. 101110. 101111. 110001. 111110. 101110. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A single flip-flop can be cleared (reset) to 1 Both A and B 0 None 1 Both A and B 0 None ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A signed integer has been stored in a byte using 2’scomplement format. We wish to store the same integer in 16-bit word. We should copy the original byte to the less significant byte of the word and fill the more significant byte with 1 Complement of the MSB of the original byte Equal to the MSB of the original byte 0 1 Complement of the MSB of the original byte Equal to the MSB of the original byte 0 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics It is desired to have a 64 × 8 ROM. The ROMs available are of 16 × 4 size. The number of ROMs required will be 4 2 8 6 4 2 8 6 ANSWER DOWNLOAD EXAMIANS APP
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