Microprocessor When an 8085 microprocessor is reset, the address bus contains 002CH 003CH 0000H 0043H 002CH 003CH 0000H 0043H ANSWER DOWNLOAD EXAMIANS APP
Microprocessor ________is the only non-vectored interrupt in 8085 microprocessor. INTR RST 7 TRAP RST 5.5 INTR RST 7 TRAP RST 5.5 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has odd parity P flag is reset when the result has even parity P flag is set when the result has even parity P flag is set when the result has odd parity P flag is reset when the result has odd parity P flag is reset when the result has even parity ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The timing difference between a slow memory and fast processor can be resolved if Neither A nor B External buffer is used Processor is capable of waiting Either A or B Neither A nor B External buffer is used Processor is capable of waiting Either A or B ANSWER DOWNLOAD EXAMIANS APP
Microprocessor CALL instruction is a ______ instruction. 1 bytes 2 bytes 4 bytes 3 bytes 1 bytes 2 bytes 4 bytes 3 bytes ANSWER DOWNLOAD EXAMIANS APP
Microprocessor IN an intel 8085A microprocessor, why is READY signal used? None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. None of these To slow down a fast peripheral device so as to communicate at the microprocessor’s device. To indicate to user that the microprocessor is working and is ready for use. To provide proper WAIT states when the microprocessor is communicating with a slow peripheral device. ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS