Digital Electronics The set of which logic gates is designated as universal gate? NOR , NAND. NOT, OR , AND. XNOR, NOR, NAND. XNOR, NOR, NAND. NOR , NAND. NOT, OR , AND. XNOR, NOR, NAND. XNOR, NOR, NAND. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics When will be the output of an OR gate is LOW ? When any input is LOW When all input is LOW When all inputs are HIGH When any input is HIGH When any input is LOW When all input is LOW When all inputs are HIGH When any input is HIGH ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The maximum positive and negative numbers which can be represented in two’s complement form using n bits are respectively, +(2n-1-1),-2n-1 +(2n-1-1),-(2n-1-1) +2n-1,-(2n-1+1) +2n-1,-2n-1 +(2n-1-1),-2n-1 +(2n-1-1),-(2n-1-1) +2n-1,-(2n-1+1) +2n-1,-2n-1 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A gate is disabled when its disable input is at logic 0. The gate is AND OR NOR none of these AND OR NOR none of these ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics 1’s complement of 17 is 10001. 11100. 01110. 10111. 10001. 11100. 01110. 10111. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits? State Reduction State Minimization State Evaluation State Assignment State Reduction State Minimization State Evaluation State Assignment ANSWER DOWNLOAD EXAMIANS APP
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