Digital Electronics Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits? State Evaluation State Assignment State Reduction State Minimization State Evaluation State Assignment State Reduction State Minimization ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics NAND. gates are preferred over others because these have lower fabrication area can be used to make any gate provide maximum density in a chip. consume least electronic power have lower fabrication area can be used to make any gate provide maximum density in a chip. consume least electronic power ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A gate is inhibited when its inhibit input is at logic 1. The gate is NAND none of these AND OR NAND none of these AND OR ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The output of a gate is LOW when at least one of its inputs is HIGH. This is true for NAND NOR OR AND NAND NOR OR AND ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics AND operation of (79)10 & (-56)10 is 42H 50H 08H 48H 42H 50H 08H 48H ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The address bus with a ROM of size 1024 × 8 bits is 8 bits 12 bits 10 bits 16 bits 8 bits 12 bits 10 bits 16 bits ANSWER DOWNLOAD EXAMIANS APP
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