Digital Electronics The output of a NAND gate is low only when all the inputs are low only when at least one input is high only when all the inputs are high only when at least one input is low only when all the inputs are low only when at least one input is high only when all the inputs are high only when at least one input is low ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics NAND. gates are preferred over others because these provide maximum density in a chip. have lower fabrication area can be used to make any gate consume least electronic power provide maximum density in a chip. have lower fabrication area can be used to make any gate consume least electronic power ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A gate is disabled when its disable input is at logic 0. The gate is NOR none of these AND OR NOR none of these AND OR ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics 2-out-of-5 code is weighted code self-complementing code non-weighted code alphanumeric code weighted code self-complementing code non-weighted code alphanumeric code ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In flip flop clock is present but in latch clock is none. present always. absent always. may be present/absent. none. present always. absent always. may be present/absent. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A bubbled OR gate is equivalent to a NOR gate X-OR gate NAND gate AND gate NOR gate X-OR gate NAND gate AND gate ANSWER DOWNLOAD EXAMIANS APP
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