Digital Electronics The output of a NAND gate is low only when at least one input is high only when all the inputs are low only when all the inputs are high only when at least one input is low only when at least one input is high only when all the inputs are low only when all the inputs are high only when at least one input is low ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A gate is enabled when its enable input is at logic 1. The gate is OR NOR NAND none of these OR NOR NAND none of these ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In LSI, the number of gate circuits per chip is 100 to 999 < 10,000 1000 to 10,000 100 to 9,999 100 to 999 < 10,000 1000 to 10,000 100 to 9,999 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of the following gates cannot be used as an inverter? NAND AND NOR X-NOR NAND AND NOR X-NOR ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The fast logic family is ECL. TRL. DRL. TTL. ECL. TRL. DRL. TTL. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The universal gate is ___________ NAND gate None of these OR gate AND gate NAND gate None of these OR gate AND gate ANSWER DOWNLOAD EXAMIANS APP