Digital Electronics A gate is enabled when its enable input is at logic 1. The gate is NAND OR none of these NOR NAND OR none of these NOR ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics If J = K (J and K are shorted) in a JK flip-flop, what circuit is made SR flip-flop Shorted JK flip-flop T flip-flop K flip-flop SR flip-flop Shorted JK flip-flop T flip-flop K flip-flop ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics When will be the output of an AND gate is HIGH if there are three inputs, A, B, and C ? A = 1, B = 1, C = 1 A = 1, B = 0, C = 1 A = 1, B = 1, C = 0 A = 0, B = 0, C = 0 A = 1, B = 1, C = 1 A = 1, B = 0, C = 1 A = 1, B = 1, C = 0 A = 0, B = 0, C = 0 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics To add two m-bit numbers, the required number of half adder is 2m+1 2m-1 2m 2m-1 2m+1 2m-1 2m 2m-1 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The boolean algebra is mostly based on De Morgans theorem Standard theorem De Morpans theorem Boolean theorem De Morgans theorem Standard theorem De Morpans theorem Boolean theorem ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The Quine– McClusky method of minimization of a logic expression is a (i) graphical method (ii) algebraic method (iii) tabular method (iv) a computer-oriented algorithm The correct answers are (iii) and (iv) (i) and (ii) (ii) and (iv) (i) and (iii) (iii) and (iv) (i) and (ii) (ii) and (iv) (i) and (iii) ANSWER DOWNLOAD EXAMIANS APP
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