Digital Computer Electronics The functional difference between SR flip-flop and JK flip-flop is that JK flip-flop has a feed back path None of these JK flip-flop accepts both inputs 1 JK flip-flop does not require external clock JK flip-flop is faster than SR flip-flop JK flip-flop has a feed back path None of these JK flip-flop accepts both inputs 1 JK flip-flop does not require external clock JK flip-flop is faster than SR flip-flop ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The time required for a pulse to decrease from 90 to 10 percent of its maximum value is known as propagation delay decay time binary level transition period rise time None of these propagation delay decay time binary level transition period rise time None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Which of the following is the first integrated logic family? DTL RTL TTL None of these MOS DTL RTL TTL None of these MOS ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics An inventor is a gate with only _____ input; the output is always in the opposite state from the input one All of these two None of these more than one one All of these two None of these more than one ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of binary number 11011001111110002 to hexadecimal number is A8B916 D9F816 None of these 78916 D8F816 A8B916 D9F816 None of these 78916 D8F816 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics With a JK master-slave flip-flop the master is cocked when the clock is _____ and the slave is triggered when the clock is _____ set, reset None of these high, low race, no change set, race set, reset None of these high, low race, no change set, race ANSWER DOWNLOAD EXAMIANS APP
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