Microprocessor The content of the A15-A8 (higher order address lines) while executing “IN 8-bit port address” instruction are all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant same as the content of A7-A0 all bits reset (i.e. 00H) all bits set (i.e. FFH) irrelevant same as the content of A7-A0 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The cycle required to fetch and execute an instruction in a 8085 microprocessor is which one of the following? Instruction cycle Memory cycle Clock cycle Machine cycle Instruction cycle Memory cycle Clock cycle Machine cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)? T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch T3 OP code fetch T4 OP code fetch T1 OP code fetch T2 OP code fetch ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Total numbers of output pins in 8085 microprocessor are 27 13 30 40 27 13 30 40 ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an 8085 microprocessor based system, the contents of SP are 2000H. POP H instruction will transfer the contents of memory location 2000H and 1FFFH to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively 2000H and 1FFFH to H and L registers respectively 2000H and 1999H to H and L registers respectively 2001H and 2002H to H and L registers respectively 2001H and 2000H to H and L registers respectively ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Using DeMorgan’s Theorem we can convert any AND-OR structure into NAND-NOR OR-NAND NOR-NAND NAND-NAND NAND-NOR OR-NAND NOR-NAND NAND-NAND ANSWER DOWNLOAD EXAMIANS APP
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