Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is (n+l)T (n-l)T 2nT nT None of these (n+l)T (n-l)T 2nT nT None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Which of the following is not functionally a complete set? AND, OR NOR AND, OR, NOT None of these NAND AND, OR NOR AND, OR, NOT None of these NAND ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The _____ is a sequence of instructions that tells the computer how to process the data. program controls None of these data instruction program controls None of these data instruction ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of an octal number 1438 to hexadecimal number is None of these 5016 6316 5716 6016 None of these 5016 6316 5716 6016 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The master slave JK flip-flop is effectively a combination of two T flip-flops None of these a T flip-flop and a D flip-flop an SR flip-flop and a T flip-flop an SR flip-flop and a D flip-flop two T flip-flops None of these a T flip-flop and a D flip-flop an SR flip-flop and a T flip-flop an SR flip-flop and a D flip-flop ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The ASCII is used only in Western Countries is version II of the ASC Standard has 128 characters, including 32 control characters None of these is a subset of 8-bit EBCDIC is used only in Western Countries is version II of the ASC Standard has 128 characters, including 32 control characters None of these is a subset of 8-bit EBCDIC ANSWER DOWNLOAD EXAMIANS APP
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