Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is 2nT nT None of these (n-l)T (n+l)T 2nT nT None of these (n-l)T (n+l)T ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of a hexadecimal number 6316 to binary number is 11001112 1110112 None of these 11000112 11001112 11001112 1110112 None of these 11000112 11001112 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics An AND gate has 7 inputs, what is the only input word that produces a 1 output? 1110000 1111111 1111 None of these 1110000 1111111 1111 None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics With an RS latch a high S and low R sets the output to _____ ; a low S and a high R _____ the output to low. None of these Race, high set, reset high, reset No change, set None of these Race, high set, reset high, reset No change, set ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics When the LOAD input of a buffer register is active, the input word is stored on the next positive _____ edge. clock pulse register None of these transistor clock pulse register None of these transistor ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The NOR gate is logically equivalent to an OR gate followed by an _____ XOR XAND AND None of these inverter XOR XAND AND None of these inverter ANSWER DOWNLOAD EXAMIANS APP
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