Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is None of these (n+l)T 2nT (n-l)T nT None of these (n+l)T 2nT (n-l)T nT ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics How many full adders are required to construct an m- bit parallel adder? m/2 m None of these m+1 m-1 m/2 m None of these m+1 m-1 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Which of the following boolean algebra statements represent commutative law (A+B)+CA+(B+C) None of these A+BB+A (B+C)(A.B)+(A.C) A+AA (A+B)+CA+(B+C) None of these A+BB+A (B+C)(A.B)+(A.C) A+AA ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Semiconductor memory is: somewhat slower than magnetic core memory somewhat larger than the magnetic core memory a volatile memory None of these All of these somewhat slower than magnetic core memory somewhat larger than the magnetic core memory a volatile memory None of these All of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics What is the main advantage of using MOSFET rather than bipolar transistor circuitary in ICs? much greater complexity (more components) than bipolar circuits : better economy None of these fewer power supply connections are required with MOS ICs system designers are more familiar with MOS circuitary higher operating speed than bipolar circuits much greater complexity (more components) than bipolar circuits : better economy None of these fewer power supply connections are required with MOS ICs system designers are more familiar with MOS circuitary higher operating speed than bipolar circuits ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics With an RS latch a high S and low R sets the output to _____ ; a low S and a high R _____ the output to low. No change, set set, reset None of these high, reset Race, high No change, set set, reset None of these high, reset Race, high ANSWER DOWNLOAD EXAMIANS APP
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