Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is (n-l)T 2nT None of these (n+l)T nT (n-l)T 2nT None of these (n+l)T nT ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The functional difference between SR flip-flop and JK flip-flop is that JK flip-flop is faster than SR flip-flop JK flip-flop accepts both inputs 1 JK flip-flop has a feed back path JK flip-flop does not require external clock None of these JK flip-flop is faster than SR flip-flop JK flip-flop accepts both inputs 1 JK flip-flop has a feed back path JK flip-flop does not require external clock None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics In boolean algebra, the overbar stands for the NOT operation, the plus sign stands for the _____ operation. NOR None of these AND OR NAND NOR None of these AND OR NAND ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of decimal number 9910 to it's octal number equivalent is None of these 1218 1248 1198 1438 None of these 1218 1248 1198 1438 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of binary number 11000112 to an octal number is 1498 None of these 1408 1478 1438 1498 None of these 1408 1478 1438 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Parallel adders are combinational logic circuits sequential logic circuits None of these both of the above All of these combinational logic circuits sequential logic circuits None of these both of the above All of these ANSWER DOWNLOAD EXAMIANS APP
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