Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is 2nT nT (n+l)T (n-l)T None of these 2nT nT (n+l)T (n-l)T None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of an octal number 738 to binary number is 1100102 1111002 None of these 1110112 1101112 1100102 1111002 None of these 1110112 1101112 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Addition of 1101012 and 1011112 is 1100112 11101112 11001002 11010002 None of these 1100112 11101112 11001002 11010002 None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Conversion of a hexadecimal number 6316 to binary number is 11001112 None of these 11001112 1110112 11000112 11001112 None of these 11001112 1110112 11000112 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The output 0 and 1 levels for TTL logic family is approximately 0.9 and 1.75V None of these -1.75 and -0.9 V 0.6 and 3.5 V 0.1 and 5 V 0.9 and 1.75V None of these -1.75 and -0.9 V 0.6 and 3.5 V 0.1 and 5 V ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics A flip-flop is a _____ element that stores a binary digit as a low or high voltage. chip memory None of these I/O bus chip memory None of these I/O bus ANSWER DOWNLOAD EXAMIANS APP