Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is (n-l)T nT None of these 2nT (n+l)T (n-l)T nT None of these 2nT (n+l)T ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The main advantage of hexadecimal numbers is the case of conversion from hexadecimal to _____ and vice versa. binary decimal ASCE None of these BCD binary decimal ASCE None of these BCD ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics What logic function is obtained by adding an inverter to the inputs of an AND gate? OR XOR NOR NAND None of these OR XOR NOR NAND None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Division of 1000112 by 1012 is 1112 None of these 1012 1002 10102 1112 None of these 1012 1002 10102 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics A NOR gate recognizes only the input word whose bits are _____ 0's None of these 0's and 1's 1's 0's or 1's 0's None of these 0's and 1's 1's 0's or 1's ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The m-bit parallel adder consists of: None of these m full adders m/2 full adders (m+1) full adders m-1 full adders None of these m full adders m/2 full adders (m+1) full adders m-1 full adders ANSWER DOWNLOAD EXAMIANS APP
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