Digital Computer Electronics With a JK master-slave flip-flop the master is cocked when the clock is _____ and the slave is triggered when the clock is _____ set, reset set, race high, low None of these race, no change set, reset set, race high, low None of these race, no change ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Which TTL sub-family has maximum speed? None of these schottky-clamped TTL high speed TTL low power TTL standard TTL None of these schottky-clamped TTL high speed TTL low power TTL standard TTL ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Standard TTL has a multiple emitter input transistor and a _____ output None of these register totem-pole bipolar transistor None of these register totem-pole bipolar transistor ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics For an input pulse train of clock period T, the delay produced by an n stage shift register is 2nT (n-l)T (n+l)T None of these nT 2nT (n-l)T (n+l)T None of these nT ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics Cyclic codes are used in All of these None of these continuously varying signal representation data transfer arithmetic and logical computation All of these None of these continuously varying signal representation data transfer arithmetic and logical computation ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics A _____ is a group of devices that store digital data. variations circuits None of these bit register variations circuits None of these bit register ANSWER DOWNLOAD EXAMIANS APP
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