Digital Electronics A gate is inhibited when its inhibit input is at logic 1. The gate is none of these OR NAND AND none of these OR NAND AND ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics What will be Excess - 3 code for decimal ( 584 )? (1000 1011 0111). (1011 0111 1000). (1000 0111 1110). (0111 0100 1000). (1000 1011 0111). (1011 0111 1000). (1000 0111 1110). (0111 0100 1000). ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics What is the Boolean expression for a two-input AND gate ? A + B A & B A.B A - B A + B A & B A.B A - B ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A D-flip-flop is said to be transparent when the output is HIGH the output is LOW the output follows clock the output follow input the output is HIGH the output is LOW the output follows clock the output follow input ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A gate is enabled when its enable input is at logic 1. The gate is NOR OR none of these NAND NOR OR none of these NAND ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The NAND gate can function as a NOT gate if one input is set to 0 all inputs are connected together one input is set to 1 inputs are left open one input is set to 0 all inputs are connected together one input is set to 1 inputs are left open ANSWER DOWNLOAD EXAMIANS APP