Digital Electronics A gate is inhibited when its inhibit input is at logic 1. The gate is none of these OR NAND AND none of these OR NAND AND ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In SSI, the number of gate circuits per chip is < 20 < 25 < 6 < 12 < 20 < 25 < 6 < 12 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics When will be the output of a NOT gate is HIGH ? the input is HIGH and LOW the input is LOW the input is HIGH None of these the input is HIGH and LOW the input is LOW the input is HIGH None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In binary number system the first digit (bit) from right to left is called as MSB, Most Significant Bit LSB, Least Significant Bit First Bit Last Bit MSB, Most Significant Bit LSB, Least Significant Bit First Bit Last Bit ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics If a counter having 10 flip flops is initially at 0, What count will if hold after 2060 pulses? 000 000 1100. 000 000 1110. 000 001 1100. 000 000 1000. 000 000 1100. 000 000 1110. 000 001 1100. 000 000 1000. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The output of a gate is LOW if and only if all its inputs are HIGH. It is true for NOR X-NOR AND NAND NOR X-NOR AND NAND ANSWER DOWNLOAD EXAMIANS APP
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