Digital Computer Electronics With a NAND latch a low R and a low S produce a _____ condition. None of these set reset no change race None of these set reset no change race ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics ASCII and EBCDIC differ in the random and sequential access method None of these the number of bytes used to store characters their efficiency in storing data their collecting sequences the random and sequential access method None of these the number of bytes used to store characters their efficiency in storing data their collecting sequences ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics An AND gate has 7 inputs. How many input word are in its truth table? 32 None of these 128 16 64 32 None of these 128 16 64 ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics A shift register moves the _____ left or right. Serial loading means storing a word in a shift register by entering _____ bit per clock pulse. With parallel or broadside loading, it takes only one _____ pulse to load the input word. right, eight, clock bits, one, clock light, eight, clock bits, one, register None of these right, eight, clock bits, one, clock light, eight, clock bits, one, register None of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics What is the hexadecimal equivalent of a binary number 10101111 9E None of these AF 8C All of these 9E None of these AF 8C All of these ANSWER DOWNLOAD EXAMIANS APP
Digital Computer Electronics The _____ is a sequence of instructions that tells the computer how to process the data. controls None of these data program instruction controls None of these data program instruction ANSWER DOWNLOAD EXAMIANS APP