Digital Electronics Why small bubble is given on the output of the NAND gate symbol ? None of these Output is inverted Open collector output Tristate None of these Output is inverted Open collector output Tristate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A gate is enabled when its enable input is at logic 0. The gate is NOR NAND none of these AND NOR NAND none of these AND ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Maximum number in decimal that can be represented by 4 bits (binary) is 4 15 16 7 4 15 16 7 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Latches are ________ circuits. count triggered edge triggered level triggered pulse triggered count triggered edge triggered level triggered pulse triggered ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In decimal number system what is MSD Middle digit First digit from right to left First digit from left to right Mean of all digits Middle digit First digit from right to left First digit from left to right Mean of all digits ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The code used in digital systems to represent decimal digits, letters, and other special characters such as + , – , . , * , etc. is natural BCD ASCII hexadecimal octal natural BCD ASCII hexadecimal octal ANSWER DOWNLOAD EXAMIANS APP
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