Digital Electronics Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins? QFP BGA PLCC PGA QFP BGA PLCC PGA ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of these circuits will give yield carry with more delay 1. Carry look ahead adder 2. Ripple carry adder none 1. both are same 2. none 1. both are same 2. ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The output of a gate is HIGH if and only if all its inputs are LOW. It is true for X-OR NAND X-NOR NOR X-OR NAND X-NOR NOR ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The AND-OR realization of a combinational circuit requires three 3-input AND gates and one 3-input OR gate. This circuit can be designed using three 3-input NAND gates and one 3-input NOR gate None of these four input NAND gates only three 3-input OR gates and one 3-input AND gate three 3-input NAND gates and one 3-input NOR gate None of these four input NAND gates only three 3-input OR gates and one 3-input AND gate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In Boolean algebra A.A is equal to A² A 2A 1 A² A 2A 1 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The NAND gate is AND gate followed by ___________. NOT gate None of these AND gate OR gate NOT gate None of these AND gate OR gate ANSWER DOWNLOAD EXAMIANS APP
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