Digital Electronics Which logic family provide minimum power dissipation JFET ECL CMOS TTL JFET ECL CMOS TTL ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics When will be the output of an AND gate is LOW ? When all inputs are HIGH When any input is LOW When any input is HIGH When all input is LOW When all inputs are HIGH When any input is LOW When any input is HIGH When all input is LOW ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The Quine– McClusky method of minimization of a logic expression is a (i) graphical method (ii) algebraic method (iii) tabular method (iv) a computer-oriented algorithm The correct answers are (i) and (iii) (ii) and (iv) (iii) and (iv) (i) and (ii) (i) and (iii) (ii) and (iv) (iii) and (iv) (i) and (ii) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics All the integers and decimal numbers are represented by whole numbers even numbers odd numbers real numbers whole numbers even numbers odd numbers real numbers ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In MSI, the number of gate circuits per chip is < 50 12 to 99 < 500 50 to 100 < 50 12 to 99 < 500 50 to 100 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics EBCDIC is abbreviated as Extended Bit Coded Decimal Interchange Code Extended Binary Color Decimal Interchange Code Extended Binary Coded Decimal Interchange Code Extended Binary Coded Dectation Interchange Code Extended Bit Coded Decimal Interchange Code Extended Binary Color Decimal Interchange Code Extended Binary Coded Decimal Interchange Code Extended Binary Coded Dectation Interchange Code ANSWER DOWNLOAD EXAMIANS APP
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