Digital Electronics In case of OR gate, no matter what the number of inputs, a 0 any input causes the output to be at logic 0 1 at any input causes the output to be at logic 1 0 at any input causes the output to be at logic 1. 1 at any input causes the output to be at logic 0 0 any input causes the output to be at logic 0 1 at any input causes the output to be at logic 1 0 at any input causes the output to be at logic 1. 1 at any input causes the output to be at logic 0 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of the following BCD codes with an odd parity bit included in the end of code group, have error in the code? (I)1001010110000 (II)0100011101100 (III)0111110000011 (IV)1000011000101 Both (I) & (II) Only (II) Both (II)&(III) Both (I)&(IV) Both (I) & (II) Only (II) Both (II)&(III) Both (I)&(IV) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Unit distance code is the other name of sequential code self-complementing code XS-3 code cyclic code sequential code self-complementing code XS-3 code cyclic code ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which is the correct order of sequence for representing the input values in K-map? (00, 10, 11, 01) (00, 01, 10, 11) (00, 10, 01, 11) (00, 01, 11, 10) (00, 10, 11, 01) (00, 01, 10, 11) (00, 10, 01, 11) (00, 01, 11, 10) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A D-flip-flop is said to be transparent when the output is HIGH the output follows clock the output follow input the output is LOW the output is HIGH the output follows clock the output follow input the output is LOW ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which of the following gate is a two-level logic gate NAND gate EXCLUSIVE OR gate OR gate NOT gate NAND gate EXCLUSIVE OR gate OR gate NOT gate ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS