Digital Electronics In case of OR gate, no matter what the number of inputs, a 1 at any input causes the output to be at logic 0 0 at any input causes the output to be at logic 1. 1 at any input causes the output to be at logic 1 0 any input causes the output to be at logic 0 1 at any input causes the output to be at logic 0 0 at any input causes the output to be at logic 1. 1 at any input causes the output to be at logic 1 0 any input causes the output to be at logic 0 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A read only memory in which the present contents must be erased before the new information can be stored is EAROM PROM All of these ROM EAROM PROM All of these ROM ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A system has following negative numbers stored in binary form as shown. The wrongly stored number is -48 as 11101000 -32 as 11100000 -89 as 10100111 -37 as 11011011 -48 as 11101000 -32 as 11100000 -89 as 10100111 -37 as 11011011 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view? Tristate output operation All of these Input operation Bi-directional I/O pin access Tristate output operation All of these Input operation Bi-directional I/O pin access ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A latch is ________ sensitive edge both level and edge level None edge both level and edge level None ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics For 4 bit parallel addition, we need ________ half adder(s) and ________ full adder(s) 0 and 4 0 and 3 1 and 4 1 and 3 0 and 4 0 and 3 1 and 4 1 and 3 ANSWER DOWNLOAD EXAMIANS APP
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