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Networks Analysis And Synthesis

Networks Analysis And Synthesis
If resistance across LM in Fig. 2.30 is 15 ohms, the value of R is

40 Q
30 Q
20 Q
10 Q

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Networks Analysis And Synthesis
A closed path made by several branches of the network is known as

Branch
Junction
Loop
Circuit

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Networks Analysis And Synthesis
A linear resistor having 0 < R < °o is a

both current controlled and voltage controlled resistor
None of these
voltage controlled resistor
current controlled resistor

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Networks Analysis And Synthesis
“Maximum power output is obtained from a network when the load resistance is equal to the output resistance of the network as seen terminals of the load”. The above statement is associated with

Maximum power transfer theorem
Thevenin’s theorem
Superposition theorem
Millman’s theorem

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Networks Analysis And Synthesis
For a voltage source

None of these
Terminal voltage is always lower than source e.m.f.
The source e.m.f. and terminal voltage are equal
Terminal voltage cannot be higher than source e.m.f.

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Networks Analysis And Synthesis
A capacitor is generally a

Linear and bilateral component
Nonlinear and active component
Bilateral and active component
Active, passive, linear and nonlinear component

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