Microprocessor A structure that stores a number of bits taken “together as a unit” is a Gate Decoder Register Mux Gate Decoder Register Mux ANSWER DOWNLOAD EXAMIANS APP
Microprocessor If the number of address bits in a memory is reduced by 2 and the addressability is doubled, the size of the memory (i.e., the number of bits stored in the memory) Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability Remains unchanged Halves Doubles Increases by 2^(address bits)/addressability ANSWER DOWNLOAD EXAMIANS APP
Microprocessor The reason for the presence of ALE pin in 8085, but not in 6800 is that 8085 has 5 interrupts lines, whereas 6800 has only two 8085 has multiplexed bus, whereas 6800 does not have None 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O 8085 has 5 interrupts lines, whereas 6800 has only two 8085 has multiplexed bus, whereas 6800 does not have None 8085 uses I/O mapped I/O, whereas 6800 uses memory mapped I/O ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which memory has read operation, byte erase, byte write and chip erase? UVEPROM EEPROM RAM Both B and C UVEPROM EEPROM RAM Both B and C ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Program counter in a digital computer Counts the number of times a subroutine is called. Points the memory address of the next instruction to be fetched. Counts the number of times the loops are executed. Counts the numbers of programs run in the machine. Counts the number of times a subroutine is called. Points the memory address of the next instruction to be fetched. Counts the number of times the loops are executed. Counts the numbers of programs run in the machine. ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which of the following conditions is not allowed in an RS latch? R is asserted, S is negated R is asserted, S is asserted R is negated, S is asserted R is negated, S is negated R is asserted, S is negated R is asserted, S is asserted R is negated, S is asserted R is negated, S is negated ANSWER DOWNLOAD EXAMIANS APP
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