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Microprocessor

Microprocessor
A structure that stores a number of bits taken “together as a unit” is a

Mux
Gate
Register
Decoder

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Microprocessor
In an 8085 microprocessor based system, the contents of SP are 1000H, PUSH B instruction will transfer the contents of registers B & C respectively for memory locations

 1000 H and 1001 H
 0FFF H and 0FFE H
 1000 H and 0FFF H
 0FFE H and 0FFF H

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Microprocessor
During which T-state, contents of OP code from memory are loaded into IR (Instruction Register)?

 T4 OP code fetch
 T2 OP code fetch
 T3 OP code fetch
 T1 OP code fetch

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Microprocessor
________used to implement the hardware interrupts (RST 7.5, RST 6.5, RST 5.5) by setting various bits to form masks or generate output data via the Serial Output Data (SOD) line.

 DI
 SIM
 EI
 RIM

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Microprocessor
The execution of RST n instruction causes the stack pointer to

 decrement by two
None of these
 remain unaffected
 increment by two

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Microprocessor
Which of the following interrupt is both level and edge sensitive?

 RST 5.5
 TRAP
 INTR
 RST 7.5

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