Microprocessor A structure that stores a number of bits taken “together as a unit” is a Mux Decoder Register Gate Mux Decoder Register Gate ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In an intel 8085A, which is the first machine cycle of an instruction? A memory write cycle A memory read cycle An op-code fetch cycle An I/O read cycle A memory write cycle A memory read cycle An op-code fetch cycle An I/O read cycle ANSWER DOWNLOAD EXAMIANS APP
Microprocessor Which one of the following interrupt/interrupts is/are only level triggering? both ‘a’ and ‘b’ RST 5.5 RST 6.5 TRAP both ‘a’ and ‘b’ RST 5.5 RST 6.5 TRAP ANSWER DOWNLOAD EXAMIANS APP
Microprocessor In 8085 microprocessor system with memory mapped I/O, which of the following is true? Devices have 8-bit address line Arithmetic and logic operations can be directly performed with the I/O data There can be maximum of 256 input devices and 256 output devices Devices are accessed using IN and OUT instructions Devices have 8-bit address line Arithmetic and logic operations can be directly performed with the I/O data There can be maximum of 256 input devices and 256 output devices Devices are accessed using IN and OUT instructions ANSWER DOWNLOAD EXAMIANS APP
Microprocessor DMA signal/signals in 8085 is/are HLDA. HOLD. READY. All. HLDA. HOLD. READY. All. ANSWER DOWNLOAD EXAMIANS APP
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