Digital Electronics A latch is ________ sensitive None level edge both level and edge None level edge both level and edge ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The AND-OR realization of a combinational circuit requires three 3-input AND gates and one 3-input OR gate. This circuit can be designed using three 3-input OR gates and one 3-input AND gate None of these four input NAND gates only three 3-input NAND gates and one 3-input NOR gate three 3-input OR gates and one 3-input AND gate None of these four input NAND gates only three 3-input NAND gates and one 3-input NOR gate ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Which one of the following even parity codes are in errors. (I)100110010 (II)011101010 (III)10111111010001010 Both (II)&(III) Both (I)&(III) Only (II) Only (III) Both (II)&(III) Both (I)&(III) Only (II) Only (III) ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics An 8 × 4 ROM contains a decoder of size 3 × 4 3 × 8 8 × 4 8 × 8 3 × 4 3 × 8 8 × 4 8 × 8 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The main equation for a D flip flop is Q=0 Q=D' Q=D Q=1 Q=0 Q=D' Q=D Q=1 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics A small circle or dot on top of an IC represents Pin13 Pin2 Pin1 Pin14 Pin13 Pin2 Pin1 Pin14 ANSWER DOWNLOAD EXAMIANS APP
EXAMIANS