Digital Electronics A latch is ________ sensitive both level and edge edge None level both level and edge edge None level ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics Digital circuit can be made by the repeated use of ___________ NAND gates NOT gates None of these OR gates NAND gates NOT gates None of these OR gates ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In ULSI, the number of gate circuits per chip is > 1,00,000 50,000 to 99,999 1,00,000 to 10,00,000 > 50,000 > 1,00,000 50,000 to 99,999 1,00,000 to 10,00,000 > 50,000 ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics The only function of NOT gate is to ___________. Act as a universal gate Invert input signal None of these Stop signal Act as a universal gate Invert input signal None of these Stop signal ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics If clock time period is 1ms, what is its frequency 1 mHz 1 kHz None of these 1 MHz 1 mHz 1 kHz None of these 1 MHz ANSWER DOWNLOAD EXAMIANS APP
Digital Electronics In an SR latch built from NOR gates, which condition is not allowed S=1, R=0 S=0, R=0 S=0, R=1 S=1, R=1 S=1, R=0 S=0, R=0 S=0, R=1 S=1, R=1 ANSWER DOWNLOAD EXAMIANS APP
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